TY - JOUR
T1 - A test generation framework for quantum cellular automata circuits
AU - Gupta, Pallav
AU - Jha, Niraj K.
AU - Lingappan, Loganathan
N1 - Funding Information:
Manuscript received December 29, 2005; revised May 27, 2006. This work was supported by the National Science Foundation under Grant CCF-0429745. P. Gupta and N. K. Jha are with the Department of Electrical Engineering, Princeton University, Princeton, NJ 08544 USA (e-mail: pgupta@princeton. edu; [email protected]). L. Lingappan is with NVIDIA Corporation, Santa Clara, CA 95050 USA. Digital Object Identifier 10.1109/TVLSI.2007.891081
PY - 2007/1
Y1 - 2007/1
N2 - In this paper, we present a test generation framework for quantum cellular automata (QCA) circuits. QCA is a nanotechnology that has attracted recent significant attention and shows promise as a viable future technology. This work is motivated by the fact that the stuck-at fault test set of a circuit is not guaranteed to detect all defects that can occur in its QCA implementation. We show how to generate additional test vectors to supplement the stuck-at fault test set to guarantee that all simulated defects in the QCA gates get detected. Since nanotechnologies will be dominated by interconnects, we also target bridging faults on QCA interconnects. The efficacy of our framework is established through its application to QCA implementations of MCNC and ISCAS'85 benchmarks that use majority gates as primitives.
AB - In this paper, we present a test generation framework for quantum cellular automata (QCA) circuits. QCA is a nanotechnology that has attracted recent significant attention and shows promise as a viable future technology. This work is motivated by the fact that the stuck-at fault test set of a circuit is not guaranteed to detect all defects that can occur in its QCA implementation. We show how to generate additional test vectors to supplement the stuck-at fault test set to guarantee that all simulated defects in the QCA gates get detected. Since nanotechnologies will be dominated by interconnects, we also target bridging faults on QCA interconnects. The efficacy of our framework is established through its application to QCA implementations of MCNC and ISCAS'85 benchmarks that use majority gates as primitives.
KW - Computer-aided design (CAD) for nanotechnologies
KW - Quantum cellular automata (QCA)
KW - Test generation
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U2 - 10.1109/TVLSI.2007.891081
DO - 10.1109/TVLSI.2007.891081
M3 - Article
AN - SCOPUS:33847741128
SN - 1063-8210
VL - 15
SP - 24
EP - 36
JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IS - 1
ER -