A Systolic Design Methodology with Application to Full-Search Block-Matching Architectures

Keyphrases

• Design Methodology 100%
• Block Matching 100%
• Motion Estimation Algorithm 100%
• Systolic Design 100%
• Block Matching Motion Estimation 100%
• Full-text Search 100%
• Array Processor 66%
• Memory Usage 66%
• Low Power 33%
• Caching 33%
• High-dimensional Data 33%
• High Performance 33%
• Cache Architecture 33%
• Data Dependency 33%
• Design Trade-offs 33%
• Design Example 33%
• Partitioning Strategy 33%
• Example-based 33%
• System Integration 33%
• Systematic Methodology 33%
• 2D Mesh 33%
• Processor Utilization 33%
• Flexible Array 33%
• Data Reusability 33%
• Array Design 33%
• Shift Register 33%
• Transformation Rules 33%
• Performance Flexibility 33%
• Massively Parallel Processor Arrays 33%
• Chip-based 33%
• High Flexibility 33%
• Systolic Array 33%
• Data Dependency Graph 33%

Computer Science

• block matching 100%
• Motion Estimation Algorithm 75%
• Array Processor 75%
• System on a Chip 25%
• High Dimensional Data 25%
• Data-Dependences 25%
• Data Dependency 25%
• System Analysis 25%
• Partitioning Approach 25%
• Systematic Methodology 25%
• Processor Utilization 25%
• Dependency Graph 25%
• Transformation Rule 25%
• Shift Register 25%
• Systolic Array 25%