A study of architecture description languages from a model-based perspective

Wei Qin, Sharad Malik

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

Owing to the recent trend of using application-specific instruction-set processors (ASIP), many Architecture Description Languages (ADLs) have been created. They specify architectures or microarchitectures of processors, and automate tasks including circuit implementation, simulation, retargetable compilation and formal verification. This paper first gives an overview of the existing ADLs. This paper argues that for an ADL to be capable of rigorously specifying a processor, it must be based on a solid foundation which we call the architecture model. The existing ADLs feature a wide variety of formal and ad-hoc architecture models which confines the flexibility and analyzability of the ADLs in one way or another. This paper then discusses the Operation State Machine (OSM) model, the result of our first attempt to create high-level processor models. The model has features balanced flexibility and analyzability for use in architecture space exploration frameworks for ASIPs. This paper also describes the use of the OSM model in the Mescal Architecture Description Language (MADL), an open-source ADL framework that we developed. Lastly, it points out the potential application of formal verification techniques on OSM.

Original languageEnglish (US)
Title of host publicationProceedings - Sixth International Workshop on Microprocessor Test and Verification
Subtitle of host publicationCommon Challenges and Solutions, MTV 2005
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages3-11
Number of pages9
ISBN (Print)0769526276, 9780769526270
DOIs
StatePublished - 2005
Event2005 6th International Workshop on Microprocessor Test and Verification - Austin, TX, United States
Duration: Nov 3 2005Nov 4 2005

Publication series

NameProceedings - International Workshop on Microprocessor Test and Verification
ISSN (Print)1550-4093

Other

Other2005 6th International Workshop on Microprocessor Test and Verification
Country/TerritoryUnited States
CityAustin, TX
Period11/3/0511/4/05

All Science Journal Classification (ASJC) codes

  • General Engineering

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