Owing to the recent trend of using application-specific instruction-set processors (ASIP), many Architecture Description Languages (ADLs) have been created. They specify architectures or microarchitectures of processors, and automate tasks including circuit implementation, simulation, retargetable compilation and formal verification. This paper first gives an overview of the existing ADLs. This paper argues that for an ADL to be capable of rigorously specifying a processor, it must be based on a solid foundation which we call the architecture model. The existing ADLs feature a wide variety of formal and ad-hoc architecture models which confines the flexibility and analyzability of the ADLs in one way or another. This paper then discusses the Operation State Machine (OSM) model, the result of our first attempt to create high-level processor models. The model has features balanced flexibility and analyzability for use in architecture space exploration frameworks for ASIPs. This paper also describes the use of the OSM model in the Mescal Architecture Description Language (MADL), an open-source ADL framework that we developed. Lastly, it points out the potential application of formal verification techniques on OSM.