A Seeded-Channel Silicon-on-Insulator (SOI) MOS Technology

W. Baerg, H. Y. Lin, B. B. Siu, C. H. Ting, J. C. Tzeng, J. C. Sturm, T. L. Hwa, J. F. Gibbons

Research output: Contribution to journalArticle

2 Scopus citations

Abstract

An improved silicon-on-insulator (SOI) MOSFET transistor structure is presented. The structure retains the density and low-capacitance advantages of SOI, but places the transistor channel region in the single-crystal silicon substrate. This “seeded-channel“ configuration avoids floating-body effects and ensures that defects in the SOI will not affect the channel mobility. The technology has been used to successfully fabricate n-channel transistors.

Original languageEnglish (US)
Pages (from-to)668-670
Number of pages3
JournalIEEE Electron Device Letters
Volume6
Issue number12
DOIs
StatePublished - Dec 1985
Externally publishedYes

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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    Baerg, W., Lin, H. Y., Siu, B. B., Ting, C. H., Tzeng, J. C., Sturm, J. C., Hwa, T. L., & Gibbons, J. F. (1985). A Seeded-Channel Silicon-on-Insulator (SOI) MOS Technology. IEEE Electron Device Letters, 6(12), 668-670. https://doi.org/10.1109/EDL.1985.26268