A reconfigurable 65nm SRAM achieving voltage scalability from 0.25-1.2V and performance scalability from 20kHz-200MHz

Mahmut E. Sinangil; Naveen Verma; Anantha P. Chandrakasan

doi:10.1109/ESSCIRC.2008.4681847

A reconfigurable 65nm SRAM achieving voltage scalability from 0.25-1.2V and performance scalability from 20kHz-200MHz

Mahmut E. Sinangil, Naveen Verma, Anantha P. Chandrakasan

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

32 Scopus citations

Abstract

A 64kb SRAM array fabricated in 65nm low-power CMOS operates from 250mV to 1.2V. This wide supply range is enabled by a combination of circuits optimized for both sub-V_t and above-V_tregimes. Reconfigurable circuits are used extensively, as low voltage assist circuits are required for functionality, but they must not limit performance during high voltage operation. The SRAM operates at 20kHz with a 250m V supply and 200MHz with a 1.2V supply. Over this range the leakage power scales by more than 50X.

Original language	English (US)
Title of host publication	ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference
Pages	282-285
Number of pages	4
DOIs	https://doi.org/10.1109/ESSCIRC.2008.4681847
State	Published - 2008
Externally published	Yes
Event	34th European Solid-State Circuits Conference, ESSCIRC 2008 - Edinburgh, Scotland, United Kingdom Duration: Sep 15 2008 → Sep 19 2008

Publication series

Name	ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference

Other

Other	34th European Solid-State Circuits Conference, ESSCIRC 2008
Country/Territory	United Kingdom
City	Edinburgh, Scotland
Period	9/15/08 → 9/19/08

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/ESSCIRC.2008.4681847

Cite this

Sinangil, M. E., Verma, N., & Chandrakasan, A. P. (2008). A reconfigurable 65nm SRAM achieving voltage scalability from 0.25-1.2V and performance scalability from 20kHz-200MHz. In ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference (pp. 282-285). Article 4681847 (ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference). https://doi.org/10.1109/ESSCIRC.2008.4681847

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title = "A reconfigurable 65nm SRAM achieving voltage scalability from 0.25-1.2V and performance scalability from 20kHz-200MHz",

abstract = "A 64kb SRAM array fabricated in 65nm low-power CMOS operates from 250mV to 1.2V. This wide supply range is enabled by a combination of circuits optimized for both sub-Vt and above-Vtregimes. Reconfigurable circuits are used extensively, as low voltage assist circuits are required for functionality, but they must not limit performance during high voltage operation. The SRAM operates at 20kHz with a 250m V supply and 200MHz with a 1.2V supply. Over this range the leakage power scales by more than 50X.",

author = "Sinangil, {Mahmut E.} and Naveen Verma and Chandrakasan, {Anantha P.}",

year = "2008",

doi = "10.1109/ESSCIRC.2008.4681847",

language = "English (US)",

isbn = "9781424423620",

series = "ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference",

pages = "282--285",

booktitle = "ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference",

note = "34th European Solid-State Circuits Conference, ESSCIRC 2008 ; Conference date: 15-09-2008 Through 19-09-2008",

}

Sinangil, ME, Verma, N & Chandrakasan, AP 2008, A reconfigurable 65nm SRAM achieving voltage scalability from 0.25-1.2V and performance scalability from 20kHz-200MHz. in ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference., 4681847, ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference, pp. 282-285, 34th European Solid-State Circuits Conference, ESSCIRC 2008, Edinburgh, Scotland, United Kingdom, 9/15/08. https://doi.org/10.1109/ESSCIRC.2008.4681847

A reconfigurable 65nm SRAM achieving voltage scalability from 0.25-1.2V and performance scalability from 20kHz-200MHz. / Sinangil, Mahmut E.; Verma, Naveen; Chandrakasan, Anantha P.
ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference. 2008. p. 282-285 4681847 (ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - A 64kb SRAM array fabricated in 65nm low-power CMOS operates from 250mV to 1.2V. This wide supply range is enabled by a combination of circuits optimized for both sub-Vt and above-Vtregimes. Reconfigurable circuits are used extensively, as low voltage assist circuits are required for functionality, but they must not limit performance during high voltage operation. The SRAM operates at 20kHz with a 250m V supply and 200MHz with a 1.2V supply. Over this range the leakage power scales by more than 50X.

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Sinangil ME, Verma N, Chandrakasan AP. A reconfigurable 65nm SRAM achieving voltage scalability from 0.25-1.2V and performance scalability from 20kHz-200MHz. In ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference. 2008. p. 282-285. 4681847. (ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference). doi: 10.1109/ESSCIRC.2008.4681847

A reconfigurable 65nm SRAM achieving voltage scalability from 0.25-1.2V and performance scalability from 20kHz-200MHz

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