A reconfigurable 65nm SRAM achieving voltage scalability from 0.25-1.2V and performance scalability from 20kHz-200MHz

Mahmut E. Sinangil, Naveen Verma, Anantha P. Chandrakasan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

30 Scopus citations

Abstract

A 64kb SRAM array fabricated in 65nm low-power CMOS operates from 250mV to 1.2V. This wide supply range is enabled by a combination of circuits optimized for both sub-Vt and above-Vtregimes. Reconfigurable circuits are used extensively, as low voltage assist circuits are required for functionality, but they must not limit performance during high voltage operation. The SRAM operates at 20kHz with a 250m V supply and 200MHz with a 1.2V supply. Over this range the leakage power scales by more than 50X.

Original languageEnglish (US)
Title of host publicationESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference
Pages282-285
Number of pages4
DOIs
StatePublished - Dec 31 2008
Externally publishedYes
Event34th European Solid-State Circuits Conference, ESSCIRC 2008 - Edinburgh, Scotland, United Kingdom
Duration: Sep 15 2008Sep 19 2008

Other

Other34th European Solid-State Circuits Conference, ESSCIRC 2008
CountryUnited Kingdom
CityEdinburgh, Scotland
Period9/15/089/19/08

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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