A power model for routers: Modeling alpha 21364 and InfiniBand routers

Hang Sheng Wang, Li Shiuan Peh, Sharad Malik

Research output: Contribution to journalArticle

63 Scopus citations

Abstract

An architectural-level power model for interconnection network routers was developed. The model was applicable to a diverse range of router microarchitectures in on-chip, chip-to-chip and board-to-board networks. Experimental results showed that buffers were the largest power hog in routers and arbiter power was negligible under high network load. The model allowed researchers and designers to factor in power estimates when exploring different architectural tradeoffs.

Original languageEnglish (US)
Pages (from-to)26-35
Number of pages10
JournalIEEE Micro
Volume23
Issue number1
DOIs
StatePublished - Jan 1 2003

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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