TY - GEN
T1 - A micro-power EEG acquisition SoC with integrated seizure detection processor for continuous patient monitoring
AU - Verma, Naveen
AU - Shoeb, Ali
AU - Guttag, John V.
AU - Chandrakasan, Anantha P.
PY - 2009
Y1 - 2009
N2 - Continuous on-scalp EEG monitoring provides a non-invasive means to detect the onset of seizures in epilepsy patients, but cables from the scalp pose a severe strangulation hazard during convulsions. Since the power of transmitting the EEG wirelessly is prohibitive, a complete SoC is presented, performing lowpower EEG acquisition, digitization, and local digital-processing to extract detection features, reducing the transmission-rate by 43x. To maximize power-efficiency, the acquisition LNA operates at the lowest reported VDD (of 1V, drawing 3.5μW), but is able to reject offsets (characteristic of metal-electrodes) that are even larger than the supply voltage. Importantly, its topology simultaneously optimizes noise-efficiency and input-impedance to maximize electrode signal-integrity, and it uses switch-capacitor transformers to improve the noise and manufactureabilty of large on-chip resistors. The complete SoC generates EEG featurevectors every 2sec, consuming a total of 9μJ per feature-vector.
AB - Continuous on-scalp EEG monitoring provides a non-invasive means to detect the onset of seizures in epilepsy patients, but cables from the scalp pose a severe strangulation hazard during convulsions. Since the power of transmitting the EEG wirelessly is prohibitive, a complete SoC is presented, performing lowpower EEG acquisition, digitization, and local digital-processing to extract detection features, reducing the transmission-rate by 43x. To maximize power-efficiency, the acquisition LNA operates at the lowest reported VDD (of 1V, drawing 3.5μW), but is able to reject offsets (characteristic of metal-electrodes) that are even larger than the supply voltage. Importantly, its topology simultaneously optimizes noise-efficiency and input-impedance to maximize electrode signal-integrity, and it uses switch-capacitor transformers to improve the noise and manufactureabilty of large on-chip resistors. The complete SoC generates EEG featurevectors every 2sec, consuming a total of 9μJ per feature-vector.
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M3 - Conference contribution
AN - SCOPUS:70449346289
SN - 9784863480018
T3 - IEEE Symposium on VLSI Circuits, Digest of Technical Papers
SP - 62
EP - 63
BT - 2009 Symposium on VLSI Circuits
T2 - 2009 Symposium on VLSI Circuits
Y2 - 16 June 2009 through 18 June 2009
ER -