TY - JOUR
T1 - A Low-Energy Machine-Learning Classifier Based on Clocked Comparators for Direct Inference on Analog Sensors
AU - Wang, Zhuo
AU - Verma, Naveen
N1 - Funding Information:
Manuscript received October 28, 2016; revised April 3, 2017; accepted May 9, 2017. Date of publication June 1, 2017; date of current version October 24, 2017. The work of Z. Wang was supported by the Honorific Fellowship from Princeton University. This work was supported in part by AFOSR under Grant FA9550-14-1-0293, in part by NSF under Grant CCF-1253670, and in part by Systems on Nanoscale Information fabriCs, one of the six SRC STARnet Centers, sponsored by MARCO and DARPA. This paper was recommended by Associate Editor X. Liu. (Corresponding author: Zhuo Wang.) The authors are with the Department of Electrical Engineering, Princeton University, Princeton, NJ 08544 USA (e-mail: pku.zwang@gmail.com; nverma@princeton.edu).
Publisher Copyright:
© 2012 IEEE.
PY - 2017/11
Y1 - 2017/11
N2 - This paper presents a system, where clocked comparators consuming only CV2 energy directly derive classification decisions from analog sensor signals, thereby replacing instrumentation amplifiers, ADCs, and digital MACs, as typically required. A machine-learning algorithm for training the classifier is presented, which enables circuit non-idealities as well as severe energy/area scaling in analog circuits to be overcome. Furthermore, a noise model of the system is presented and experimentally verified, providing a means to predict and optimize classification error probability in a given application. The noise model shows that superior noise efficiency is achieved by the comparator-based system compared with a system based on linear low-noise amplifiers. A prototype in 130-nm CMOS performs image recognition of handwritten numerical digits, by taking raw analog pixels as the inputs. Due to pin limitations on the chip, the images with 28×28=784 pixels are resized and downsampled to give 47 pixel features, yielding an accuracy of 90% for an ideal ten-way classification system (MATLAB simulated). The prototype comparator-based system achieves equivalent performance with a total energy of 543 pJ per ten-way classification at a rate up to 1.3 M images per second, representing 33× lower energy than an ADC/digital-MAC system.
AB - This paper presents a system, where clocked comparators consuming only CV2 energy directly derive classification decisions from analog sensor signals, thereby replacing instrumentation amplifiers, ADCs, and digital MACs, as typically required. A machine-learning algorithm for training the classifier is presented, which enables circuit non-idealities as well as severe energy/area scaling in analog circuits to be overcome. Furthermore, a noise model of the system is presented and experimentally verified, providing a means to predict and optimize classification error probability in a given application. The noise model shows that superior noise efficiency is achieved by the comparator-based system compared with a system based on linear low-noise amplifiers. A prototype in 130-nm CMOS performs image recognition of handwritten numerical digits, by taking raw analog pixels as the inputs. Due to pin limitations on the chip, the images with 28×28=784 pixels are resized and downsampled to give 47 pixel features, yielding an accuracy of 90% for an ideal ten-way classification system (MATLAB simulated). The prototype comparator-based system achieves equivalent performance with a total energy of 543 pJ per ten-way classification at a rate up to 1.3 M images per second, representing 33× lower energy than an ADC/digital-MAC system.
KW - Classification
KW - comparators
KW - low-energy accelerator
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U2 - 10.1109/TCSI.2017.2703880
DO - 10.1109/TCSI.2017.2703880
M3 - Article
AN - SCOPUS:85036469069
SN - 1549-8328
VL - 64
SP - 2954
EP - 2965
JO - IEEE Transactions on Circuits and Systems I: Regular Papers
JF - IEEE Transactions on Circuits and Systems I: Regular Papers
IS - 11
M1 - 7937849
ER -