A Hierarchical Modeling Framework for On-Chip Communication Architectures of Multiprocessing SOCS

Keyphrases

• Hierarchical Modeling Framework 100%
• On-chip Bus 33%
• Prototyping Platform 33%
• Class Library 33%
• Execution-driven Simulation 33%
• Design Time 33%
• Hierarchical Classes 33%
• Design Quality 33%
• Communication Subsystem 33%
• Library Design 33%
• Modeling Environment 33%

Computer Science

• Modeling Framework 100%
• Packet-Switching Network 16%
• Modeling Environment 16%
• Prototyping Platform 16%