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Keyphrases
Register Transfer Level
100%
Design for Testability
100%
Flow Extraction
100%
Control Data
100%
Order of Magnitude
75%
Test Pattern Generator
75%
Multiplexer
50%
Bit-width
50%
Testability
50%
Generation Time
50%
Sequential Test
50%
Test Generation
50%
Energy Overhead
50%
Gate-level
50%
Full Scan
50%
Combinational
25%
Three-order
25%
Area Overhead
25%
System Testing
25%
Fault Coverage
25%
Testability Analysis
25%
Low Area
25%
Control Flow
25%
Functional Information
25%
Digital Filter
25%
Level Controller
25%
High-level Fault Coverage
25%
Behavioral Information
25%
Data Flow Information
25%
Output Response
25%
Combined Controller
25%
Embedded Elements
25%
Handler
25%
Testing Rates
25%
Path Test
25%
Functional Control
25%
Symbolic Nature
25%
Computer Science
Register-Transfer Level
100%
Test Generation
50%
Fault Coverage
50%
Data Controller
50%
Generation Time
50%
Multiplexer
50%
Experimental Result
25%
Test Application Time
25%
Testability Analysis
25%
Control Flow
25%
Critical Path
25%
Protocol Handler
25%
Digital Filter
25%
Flow Information
25%