A 65nm Sub-Vt microcontroller with integrated SRAM and switched-capacitor DC-DC converter

Joyce Kwong, Yogesh Ramadass, Naveen Verma, Markus Koesler, Korbinian Huber, Hans Moormann, Anantha Chandrakasan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

90 Scopus citations

Abstract

A 65nm sub-Vt SoC integrates an on-chip, switched capacitor DC-DC converter with a 16b microcontroller and 128kb SRAM. The core logic is verified with a custom sub-Vt timing methodology. Functional down to 0.3V, the chip achieves 1 μW standby power at minimum Vdd. The converter realizes 75% efficiency at the minimum energy voltage of 0.5V

Original languageEnglish (US)
Title of host publication2008 IEEE International Solid State Circuits Conference - Digest of Technical Papers, ISSCC
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages318-320
Number of pages3
ISBN (Print)9781424420100
DOIs
StatePublished - 2008
Externally publishedYes
Event2008 IEEE International Solid State Circuits Conference, ISSCC - San Francisco, CA, United States
Duration: Feb 3 2008Feb 7 2008

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume51
ISSN (Print)0193-6530

Other

Other2008 IEEE International Solid State Circuits Conference, ISSCC
Country/TerritoryUnited States
CitySan Francisco, CA
Period2/3/082/7/08

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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