@inproceedings{76a47163ee404610b24536b2a433d9d3,
title = "A 26-42 GHz Broadband, Back-off Efficient and Vswr Tolerant CMOS Power Amplifier Architecture for 5G Applications",
abstract = "Future mm-Wave transmitter front-ends will need to operate in an electromagnetically complex environment that are resistant to near-field antenna perturbations (VSWR events) while operating across multiple mmWave frequency bands (28/37/39/42 GHz) and with high efficiency and linearity with spectrally efficient modulation. This is particularly difficult since these parameters (bandwidth, linearity, efficiency, and VSWR tolerance) trade off strongly with each other in a power amplifier (PA). In this paper, we present a PA architecture that exploits mutual load pulling through a multi-port network in a nonlinear fashion to achieve VSWR tolerance while demonstrating Doherty-like operation across 26-42 GHz. The PA designed in 65-nm bulk CMOS generates P-sat \gt 19 dBm with PAE -peak \gt 20% across all bands and achieves up to 3.35x and 4.84x enhancement in PAE at back-off power levels of 6 and 9.6 dB over class-A operation. In addition, the PA demonstrates strong tolerance to VSWR events with only 2 dB degradation over a VSWR 4:1 load circle and supports 64QAM OFDM modulation with 8 Gbps across 28-40GHz.",
keywords = "5G, Doherty, Power amplifier, Power combining, backoff, broadband, loadpull, millimeter-Wave",
author = "Chappidi, {Chandrakanth R.} and Kaushik Sengupta",
note = "Publisher Copyright: {\textcopyright} 2019 JSAP.; 33rd Symposium on VLSI Circuits, VLSI Circuits 2019 ; Conference date: 09-06-2019 Through 14-06-2019",
year = "2019",
month = jun,
doi = "10.23919/VLSIC.2019.8778095",
language = "English (US)",
series = "IEEE Symposium on VLSI Circuits, Digest of Technical Papers",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "C22--C23",
booktitle = "2019 Symposium on VLSI Circuits, VLSI Circuits 2019 - Digest of Technical Papers",
address = "United States",
}