A 20-GSample/s (10 GHz × 2 clocks) burst-mode CDR based on injection-locking and space sampling for access networks

Bhavin J. Shastri; Paul Richard Prucnal; David V. Plant

doi:10.1109/IPCon.2012.6358823

A 20-GSample/s (10 GHz × 2 clocks) burst-mode CDR based on injection-locking and space sampling for access networks

Bhavin J. Shastri, Paul Richard Prucnal, David V. Plant

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

We demonstrate a novel 20-GSample/s burst-mode CDR circuit featuring instantaneous (0-bit) phase acquisition with BER<10^-10 for any phase step (2π rad) between successive bursts. Our design incorporates injection-locking and space sampling for clock phase recovery/alignment.

Original language	English (US)
Title of host publication	2012 IEEE Photonics Conference, IPC 2012
Pages	717-718
Number of pages	2
DOIs	https://doi.org/10.1109/IPCon.2012.6358823
State	Published - Dec 1 2012
Event	25th IEEE Photonics Conference, IPC 2012 - Burlingame, CA, United States Duration: Sep 23 2012 → Sep 27 2012

Other

Other	25th IEEE Photonics Conference, IPC 2012
Country/Territory	United States
City	Burlingame, CA
Period	9/23/12 → 9/27/12

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

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10.1109/IPCon.2012.6358823

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title = "A 20-GSample/s (10 GHz × 2 clocks) burst-mode CDR based on injection-locking and space sampling for access networks",

abstract = "We demonstrate a novel 20-GSample/s burst-mode CDR circuit featuring instantaneous (0-bit) phase acquisition with BER<10-10 for any phase step (2π rad) between successive bursts. Our design incorporates injection-locking and space sampling for clock phase recovery/alignment.",

author = "Shastri, {Bhavin J.} and Prucnal, {Paul Richard} and Plant, {David V.}",

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AU - Plant, David V.

PY - 2012/12/1

Y1 - 2012/12/1

N2 - We demonstrate a novel 20-GSample/s burst-mode CDR circuit featuring instantaneous (0-bit) phase acquisition with BER<10-10 for any phase step (2π rad) between successive bursts. Our design incorporates injection-locking and space sampling for clock phase recovery/alignment.

AB - We demonstrate a novel 20-GSample/s burst-mode CDR circuit featuring instantaneous (0-bit) phase acquisition with BER<10-10 for any phase step (2π rad) between successive bursts. Our design incorporates injection-locking and space sampling for clock phase recovery/alignment.

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BT - 2012 IEEE Photonics Conference, IPC 2012

T2 - 25th IEEE Photonics Conference, IPC 2012

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A 20-GSample/s (10 GHz × 2 clocks) burst-mode CDR based on injection-locking and space sampling for access networks

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