Abstract
This microprocessor explores an architectural solution to scalability problems in scalar operand networks. The 0.15μm 6M process, 331mm2 research prototype issues 16 unique instructions per cycle and uses an on-chip point-to-point scalar operand network to transfer operands among distributed functional units.
Original language | English (US) |
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Pages (from-to) | 157+170-171 |
Journal | Digest of Technical Papers - IEEE International Solid-State Circuits Conference |
State | Published - 2003 |
Event | 2003 Digest of Technical Papers - , United States Duration: Feb 9 2003 → Feb 13 2003 |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering