Abstract
This paper describes the architectural extensions to the PA-RISC 1.1 architecture to enable 64-bit processing of integers and pointers. It also describes MAX, the Multimedia Acceleration eXtensions which speed up the processing of multimedia and other applications with parallelism at the intra instruction, or subword, level. Other additions to the PA-RISC 2.0 architecture include performance enhancements with respect to memory hierarchy management, branch penalty reduction, and floating-point performance.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 152-160 |
| Number of pages | 9 |
| Journal | Digest of Papers - COMPCON - IEEE Computer Society International Conference |
| State | Published - 1996 |
| Event | Proceedings of the 1996 41st IEEE Computer Society International Conference, COMPCON'96 - Santa Clara, CA, USA Duration: Feb 25 1996 → Feb 28 1996 |
All Science Journal Classification (ASJC) codes
- General Engineering