25-nm p-channel vertical MOSFET's with SiGeC source-drains

Min Yang, Chia Lin Chang, Malcolm Carroll, J. C. Sturm

Research output: Contribution to journalArticlepeer-review

46 Scopus citations


The scaling of vertical p-channel MOSFET's with the source and drain doped with boron during low temperature epitaxy is limited by the diffusion of boron during subsequent side wall gate oxidation. By introducing thin SiGeC layers in the source and drain regions, this diffusion has been suppressed, enabling for the first time the scaling of vertical p-channel MOSFET's to under 100 nm in channel length to be realized. Device operation with a channel length down to 25 nm has been achieved.

Original languageEnglish (US)
Pages (from-to)301-303
Number of pages3
JournalIEEE Electron Device Letters
Issue number6
StatePublished - Jun 1999

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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