Margaret Rose Martonosi

Source: Scopus
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1 Active
7 Finished

SHF:Medium:Collaborative Research: Decentralized On-Chip Infrastructure for Robustness and Portability in Heterogeneous Multicores
Martonosi, M. R.
NSF - National Science Foundation
9/1/18 → 8/31/22
Project: Research project
CPS: Small: Collaborative Research: Towards Secure, Privacy-Preserving, Verifiable Cyberphysical Systems
Martonosi, M. R.
NSF - National Science Foundation
10/1/17 → 9/30/20
Project: Research project
SHF: Small: DeSCPar: Decoupled Supply-Compute Communication Management for Heterogeneous, Accelerator-Oriented Parallelism
Martonosi, M. R.
NSF - National Science Foundation
8/1/16 → 7/31/20
Project: Research project
XPS: EXPL: CCA: Verification and Optimization Tools for Heterogeneous Memory Consistency Models
Martonosi, M. R.
NSF - National Science Foundation
9/1/15 → 8/31/19
Project: Research project
SHF: Small: Collaborative Research: Tailoring Memory Accesses and Communication in Heterogeneous Multiprocessors: Power and Performance Opportunities
Martonosi, M. R.
NSF - National Science Foundation
9/1/11 → 8/31/16
Project: Research project

13678 Citations
55 h-Index
108 Conference contribution
66 Article
18 Conference article
15 Paper
More

An updated LLVM-based quantum research compiler with further OpenQASM support
Litteken, A., Fan, Y. C., Singh, D., Martonosi, M. & Chong, F. T., Jul 2020, In: Quantum Science and Technology. 5, 3, 034013.
Research output: Contribution to journal › Article › peer-review
1 Scopus citations
Architecting Noisy Intermediate-Scale Quantum Computers: A Real-System Study
Murali, P., Linke, N. M., Martonosi, M., Abhari, A. J., Nguyen, N. H. & Alderete, C. H., May 1 2020, In: IEEE Micro. 40, 3, p. 73-80 8 p., 9057609.
Research output: Contribution to journal › Article › peer-review
Architecting Noisy Intermediate-Scale Trapped Ion Quantum Computers
Murali, P., Debroy, D. M., Brown, K. R. & Martonosi, M., May 2020, Proceedings - 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture, ISCA 2020. Institute of Electrical and Electronics Engineers Inc., p. 529-542 14 p. 9138945. (Proceedings - International Symposium on Computer Architecture; vol. 2020-May).
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
2 Scopus citations
A Simulator and Compiler Framework for Agile Hardware-Software Co-design Evaluation and Exploration
Sorensen, T., Manocha, A., Tureci, E., Orenes-Vera, M., Aragon, J. L. & Martonosi, M., Nov 2 2020, In: IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. 2020-November, 9256600.
Research output: Contribution to journal › Conference article › peer-review

Open Access
Foundations of empirical memory consistency testing
Kirkham, J., Sorensen, T., Tureci, E. & Martonosi, M., Nov 13 2020, In: Proceedings of the ACM on Programming Languages. 4, OOPSLA, 226.
Research output: Contribution to journal › Article › peer-review

Open Access