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Dive into the research topics where Aarti Gupta is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
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Collaborations and top research areas from the last five years
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Projects
- 5 Finished
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Collaborative Research: SHF: Medium: Automated Word Level Synthesis for Hardware Code Generation and Verified Abstraction
Gupta, A. (PI)
NSF - National Science Foundation
7/15/21 → 6/30/25
Project: Research project
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FMitF: OpenRDC: A Framework for Implementing Open, Reliable, Distributed, Network Control
Gupta, A. (PI)
NSF - National Science Foundation
10/1/18 → 9/30/23
Project: Research project
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Verification Mentoring Workshop II
Gupta, A. (PI)
NSF - National Science Foundation
4/1/16 → 3/31/18
Project: Research project
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SHF: Small: Driving Learning for Program Verification
Gupta, A. (PI)
NSF - National Science Foundation
9/1/15 → 8/31/19
Project: Research project
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Verification Mentoring Workshop
Gupta, A. (PI)
NSF - National Science Foundation
4/1/15 → 3/31/16
Project: Research project
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A Layered Formal Methods Approach to Answering Queue-related Queries
Raghunathan, D., Apostolaki, M. & Gupta, A., 2025, Proceedings of the 22nd USENIX Symposium on Networked Systems Design and Implementation, NSDI 2025. USENIX Association, p. 1289-1304 16 p. (Proceedings of the 22nd USENIX Symposium on Networked Systems Design and Implementation, NSDI 2025).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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Automatic Generation of Cycle-Accurate Timing Models from RTL for Hardware Accelerators
Zeng, Y., Gupta, A. & Malik, S., Apr 9 2025, Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2024. Institute of Electrical and Electronics Engineers Inc., 155. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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Hierarchical Formal Verification of Hardware
Lu, H., Xing, Y., Gupta, A. & Malik, S., 2025, (Accepted/In press) In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.Research output: Contribution to journal › Article › peer-review
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Application-level Validation of Accelerator Designs Using a Formal Software/Hardware Interface
Huang, B. Y., Lyubomirsky, S., Li, Y., He, M., Smith, G. H., Tambe, T., Gaonkar, A., Canumalla, V., Cheung, A., Wei, G. Y., Gupta, A., Tatlock, Z. & Malik, S., Feb 15 2024, In: ACM Transactions on Design Automation of Electronic Systems. 29, 2, 35.Research output: Contribution to journal › Article › peer-review
Open Access3 Scopus citations -
Buffy: A Formal Language-Based Framework for Network Performance Analysis
Seyhani, A., Zhao, J., Gupta, A., Walker, D. & Arashloo, M. T., Nov 18 2024, HOTNETS 2024 - Proceedings of the 2024 3rd ACM Workshop on Hot Topics in Networks. Association for Computing Machinery, Inc, p. 95-102 8 p. (HOTNETS 2024 - Proceedings of the 2024 3rd ACM Workshop on Hot Topics in Networks).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution